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Step 1: An oxide layer is grown on the ( 100 ) silicon wafer. Consequent, patterning is carried out on the oxide to demarcate the windows. The edges of the windows are oriented along the direction.

 Step 2: Cleaning of the wafer is carried out

 Step 3: Wafer is loaded into an epitaxial reactor and submitted to a hovering - temperature hydrogen bake to bleed the native oxide from the seeding windows.

 Step 4: Epitaxial widening is performed meeting, using e. g: SiHCl + H + HCL gas brew.

 Step 5: Appropriate an rule - situ HCl etch step to drain section crystallites that may sell for formed on the oxide due to nucleation of bantam silicon crystals take cover fortuitous learning during the epitaxial hike.

 Step 6: Once the modest nuclei are removed, a novel epitaxial augmentation step is performed, followed by an etch step, and this repeats until the oxide is underground by epitaxial silicon.

 Some points we should note is that the epitaxial gain proceeds from the seeding windows both vertically and laterally, and the silicon shiny is limited by the and facets. When two beefing up fronts, seeded from converse sides of the oxide, interlace well-adjusted, a akin silicon - on - insulator film is formed, which contains a low - angle subgrain boundary bearings the two gain fronts fit. A groove is observed over the centre of the SOI area. When else cultivation is done, this groove disappears.

 Whereas much because this is a picnic means to have homoepitaxial expansion, a higher disadvantage is the nearly 1: 1 lateral - to - vertical progress ratio. On the other hand, the thick ELO film allows the invent administer to secure SOI films of distant diameter tender smartly by polishing the wafers to required depths whereas needed. Further, the low defect density and low temperate distribute needed to machine a ELO - SOI is considered superior to other technologies close since SIMOX ( Separation by Implanted Oxygen ) or other SOI processes for submicron devices.

 Applications for this approach obtain been observed force three - dimensional and twofold - gate devices.