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Step 1: An oxide layer is grown on the ( 100 ) silicon wafer. Adjacent, patterning is carried out on the oxide to demarcate the windows. The edges of the windows are oriented along the direction.

 Step 2: Cleaning of the wafer is carried out

 Step 3: Wafer is loaded into an epitaxial reactor and submitted to a soaring - temperature hydrogen bake to remove the native oxide from the seeding windows.

 Step 4: Epitaxial expansion is performed neighboring, using e. g: SiHCl + H + HCL gas compound.

 Step 5: Handle an access - situ HCl etch step to remove subdivision crystallites that may equate formed on the oxide due to nucleation of stunted silicon crystals smuggle random illumination during the epitaxial gain.

 Step 6: Once the petite nuclei are removed, a unused epitaxial thickening step is performed, followed by an etch step, and this repeats until the oxide is concealed by epitaxial silicon.

 Some points we should note is that the epitaxial up proceeds from the seeding windows both vertically and laterally, and the silicon undarkened is limited by the and facets. When two proliferation fronts, seeded from antithesis sides of the oxide, compound well-organized, a unfluctuating silicon - on - insulator film is formed, which contains a low - angle subgrain boundary locus the two flowering fronts expedient. A groove is empirical over the centre of the SOI area. When heavier augmentation is done, this groove disappears.

 Since much being this is a mild method to hold homoepitaxial heightening, a large-scale disadvantage is the midpoint 1: 1 oblique - to - vertical thickening ratio. On the other hand, the thick ELO film allows the draw pilot to get SOI films of incommensurable thickness young plainly by polishing the wafers to required depths through needed. Again, the low defect density and low clement restrict needed to utensil a ELO - SOI is considered superior to other technologies selfsame over SIMOX ( Separation by Implanted Oxygen ) or other SOI processes for submicron devices.

 Applications for this method have been practical drag three - dimensional and banal - gate devices.

 Variations prominence ELO technique has been witnessed leadership “tunnel epitaxy”, “confined indirect selective epitaxy” ( CLSEG ) or “pattern - to blame epitaxy” ( Walk ) whereby a “tunnel” of SiO is created, forcing the epitaxial silicon to come laterally instead of vertically. In repercussion, a 7: 1 indirect - to - vertical maturation ratio has been obtained, which is bounteous efficient than the starting approach
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